The present invention relates to a high frequency power amplifier module (or a high frequency power amplifier) including a plurality of amplification lines for linear amplifications and for non-linear amplifications (or saturated amplifications), and a wireless communication system packaging the high frequency power amplifier module. More particularly, the invention relates to a technique effective when applied to a multi-mode communication type cellular mobile phone having a plurality of communication functions of different communication modes.
In North America, in recent years, there has been employed the so-called “dual mode mobile phone” in which there are incorporated into one mobile phone: the analog type AMPS (Advanced Mobile Phone Service) employed in the prior art and covering the entire North America; and the digital system such as the TDMA (Time Division Multiple Access) or the CDMA (Code Division Multiple Access).
In Europe and so on, on the other hand, there has been employed the GSM (Global system for Mobile Communication) system using the TDMA technique and the FDD (Frequency Division Duplex) technique. In the GSM system, on the other hand, there has been developed the EDGE (Enhanced Data Rates for GSM Evolution) system as the communication system capable of enhancing the transmission rate.
The multi-mode communications by the dual mode mobile phone or the like are described, for example, on pp. 115 to 126 of “NIKKEI ELECTRONICS” (No. 681), issued by NIKKEI BP on Jan. 27, 1997.
Into the wireless communication system (or the mobile phone), there is incorporated an amplifier (or the high frequency power amplifier module) packaging transistors in multiple stages. The communication system is seriously influenced by the performance of the high frequency power amplifier module.
In Japanese Patent Laid-Open No. 154321/1992, there is disclosed a high frequency power amplifier which can control the high frequency output power over a wide range while retaining the satisfactory linear characteristics and the power efficiency stably. This high frequency power amplifier has a multistage construction using a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a GaAs-FET in the final stage circuit so that the high frequency output power is variably controlled by changing the bias condition of the drive circuit from the outside while keeping the bias of the final stage circuit constant. There is also disclosed a technique for controlling the output power by incorporating a variable attenuator circuit into a high frequency input line of the aforementioned circuit.
In Japanese Patent Laid-Open No. 26776/1999, on the other hand, there is disclosed a power amplifier which can reduce the power consumption without increasing the distortion and can improve the power efficiency. This power amplifier has a high frequency circuit employing a dual gate FET. This power amplifier is constructed such that two stages of dual gate FETs are cascade-connected between an input terminal In and an output terminal OUT. Specifically, the first gate on the drain side of the dual gate FET at the first stage is connected with the input terminal IN, and the drain is connected with the first gate on the drain side of the dual gate FET at the final stage. The drain of the dual gate FET at the final stage is connected with the output terminal OUT. The first gates of the first stage and the final stage are connected with a first gate input terminal G1, and the second gates of the first stage and the final stage are connected with a second gate input terminal G2.